Your responsibilities include but are not limited to developing and enabling innovative inspection and metrology techniques to enable advanced packaging technologies. Recipe Development and Optimization: Develop and optimize metrology recipes for various semiconductor processes Ensure that the recipes are accurate and efficient for production needs Develop and execute strategies for process monitoring, sampling, and continuous improvement (CIP) Establish inspection methodologies and best-known methods (BKM) for metrology processes Perform in-line characterization and validation of metrology recipes Work closely with various teams, including the Package Integration, PWF/Assembly Engineering, Front End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality, to integrate manufacturing processes for optimal performance and quality control B.S/M.S./Ph.D. (or equivalent education) in Mechanical Engineering, Chemical Engineering, Electrical Engineering, Physics, or other related technical fields 2 or more years of semiconductor process or equipment engineering experience, preferably in wafer bonding, plating, warpage control and packaging field Strong understanding of process flows, process interactions, and how process changes can affect yield, performance, and reliability Hands on experience with wafer/assembly tools or metrology/RDA systems Tenacity to work effectively under timelines and limited resources Consistent track record to solve problems and address root causes
