Senior Engineer, Design Verification (Automotive)
Marvell
- Singapore
- Permanent
- Full-time
- Use latest tools and methodologies such as UVM to develop state of the art verification environment to verify the functionalities of automotive ethernet switches.
- Formulate and develop coverage-driven, constrained random tests to catch pre-silicon design bugs.
- Work with design engineers, verification architect to design test plan, coverage model and test suites to improve the quality of our chips to satisfy automotive customer requirements.
- Engage in development of new verification methodologies and continuous workflow improvement to achieve certification in functional safety.
- Master’s Degree in Electronics/Electrical Engineering or related fields (such as Computer Engineering, Communications Engineering, Computer Control and Automation) with coursework in digital logic design, coding, and networking.
- Bachelor’s degree holder in Electronics/Electrical Engineering or related fields with good results are encouraged to apply.
- Have less than 2 years relevant experience.
- Have experience in Object Oriented Programming language such as Java, System Verilog, C++. Candidate with experience in other programming language will also be considered.
- Knowledge of scripting languages such as Perl, Python, Make.
- Must have excellent verbal and written communication skills.