
Engineer - Customer Layout / Testchip Implementation
- Singapore
- Permanent
- Full-time
- Process Characterization/Qualification Test Chip
- Memory (SRAM/NVM), I/O Cell, Analog Macro Layout DesignYour JobWork with R&D and Fab Process Integration & Module teams to help define advanced test chip for new technology development.Be able to lead a sub-team to complete a full-scale test chip development, from plan to tape-out.Provide custom layout design for Memory (SRAM/NVM), I/O Cell, and Analog Macro Layout DesignTo develop new/sophisticated or to maintain existing EDA codes for automation.To ensure successful accomplishment of projects.For senior engineer position: Understand test structures / macro/ testchip ; be able to provide technical support/guidance to other engineers.Required QualificationsBachelor's/Master's degree in Electrical, Electronics Engineering, Computer Science, Physics or equivalent.Bachelor's/Master's degree holders. Experience in wafer fabrication or IC Mask design environment is preferred (but not compulsory)Semiconductor Physics, CMOS Device knowledge is essentialProgramming skills and circuit Design background is a plus.Preference: Engineer with 1-3 years of relevant experienceOther Essential Attributes:Good interpersonal skill, tactful, resourceful, possess initiativePossess good working attitude, well organized and work well within a team environmentMotivated and independentGlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.
As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.
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